1. Field of Invention
The present invention relates generally to the field of electrical and electronics power distribution. More particularly, the present invention is directed in one exemplary aspect to apparatus and methods for dynamically allocating current among a plurality of electrical ports on electronic devices.
2. Description of Related Technology
Many data bus specifications today require that a host controller or other such device supply a specific amount of electrical power to each port of the controller. For example, the latest Universal Serial Bus (USB) specification, USB 2.0 requires a supply of 2.5 Watts (0.5 A @ +5V), or 500 mA (minimum) per port. Thus, in an exemplary two-port USB system, the power supply must have approximately 1000 mA budgeted exclusively for USB.
In the near future, devices will be capable of accommodating (and some may in fact require) more current than the fixed amount required by a governing specification. For example, a USB-compliant portable end user device (such as for example an mp3 player or the like) may be needed to draw up to 1100 mA of current (such as based on a manufacturer's design specification), and in fact may be physically capable of higher currents (e.g., 1500 mA). Current that is not used to directly power the mp3 player is often ultimately used for other purposes, such as charging the device's batteries. Obviously, the more current that the device is able to draw (given the same baseline load), the faster its batteries will charge. Advantageously, this means less waiting or “down” time for the user.
However, if the amount of current to be supplied is over-budgeted in the power supply, then the power supply often will no longer operate efficiently. Essentially, the efficiency of the power supply turns largely on its associated load. For instance, a typical computer power supply (5.0 V), may be capable of a total output of 2200 mA, yet has a fairly narrow peak efficiency band (say at 1600 or 1700 mA). In effect, the power supply must be designed for maximum power output (e.g., to accommodate high-draw devices), thereby making it less efficient at lower and typically more common levels. Hence, operating this power supply at low currents causes it to operate at less-than-optimal efficiency, thereby in effect wasting power.
So, in the case of the aforementioned 2200 mA power supply, it may have a peak efficiency range up at 1600-1700 mA, thereby causing it to operate very inefficiently when only low output current (say 500 mA) is drawn. This problem is exacerbated when most of the devices actually plugged into the ports are low-draw devices; the system is designed to operate best at high draw conditions, but such high draw conditions may only occur a very small fraction of the time.
FIG. 1 is a block diagram illustrating a typical bus network configuration known in the prior art. A power supply 102 resident in a computerized device 100 (e.g., PC or laptop) receives electrical current through a power cable 101, for instance a 115 VAC 60 Hz cord. The power supply 102 is responsible for providing power directly or indirectly to the various components of the computerized device 100. These components may include inter alia a central processing unit (CPU) 106, a volatile memory device 104 (such as RAM, DRAM, eDRAM, SRAM, or 1T-SRAM), a non-volatile storage device 108 (such as ROM, PROM, EAROM, EPROM, flash memory, a hard disk drive or HDD, etc.), and a host controller 110. Other components (not shown) are powered by the power supply as well.
The host controller 110 may comprise e.g., a module, card or board having one or more ports 112 each adapted to receive a bus connector 114. The host controller assembly 110 typically slides into the backplane, main board, or motherboard of the computer 100. The host controller 110 is responsible for handling communications involving one or more devices 116 (e.g., serial bus devices), the CPU 106, and the RAM 104. The host controller also distributes power among the various devices 116 which connect to the host controller 110 through one of the ports 112. Usually, a cable 118 (e.g., serial bus cable) with one or more connectors 114 is used as the link for connecting up the device 116 to a corresponding port 112 on the host controller 110.
In order for the host controller 110 to achieve compliance with a certain bus standard (e.g., serial bus standard), the host controller 110 must be designed to satisfy a number of rules described within a target specification. For example, according to the latest USB specification, the host controller 110 is required to reserve 2.5 W of power (500 mA of current) per each port 112 comprised within the controller 110. Thus, in order to achieve compliance with a target standard, the minimum amount of current that the power supply 102 must budget for the serial bus network is number of ports 112 multiplied by the minimum amount of current required per each port (as taken from the specification). For example, in the n-port USB controller illustrated by FIG. 2, the power supply 102 must have (n×500 mA) of current exclusively allocated for USB.
Now suppose that one of the aforementioned 1100 mA serial bus devices is connected to the two-port system described above, while the power supply retains its 1000 mA budget for USB. In this situation, the user would not benefit in any appreciable manner from having a serial bus device capable of supporting up to 1100 mA of current. This is because the USB specification requires 500 mA to be reserved per each port, and in a two-port system, this leaves no current remaining which might otherwise be used for implementing desirable features such as the fast battery charge mentioned above.
Furthermore, existing prior art solutions are typically “hard set” so that each port has a fixed amount of power allocated thereto, with no mechanism for reallocation. Certain prior art approaches do have the ability for adjustment, but this is accomplished via a set of resistors (e.g., varistor) or other such components, and is effectively a one-time adjustment; it is impractical to adjust these components on a regular basis, and a user will generally not know how to accomplish this, let alone want to deal with the inconvenience of doing so.
Presently, there is no method or apparatus for enabling a serial bus device to operate outside of a governing serial bus specification, yet provide efficient and dynamically optimized operational characteristics. The prior art only loosely concerns itself with these issues.
For example, U.S. Pat. No. 7,219,180 to Frank issued May 15, 2007 entitled, “Combined uninterruptable power supply and bus control module to improve power management and legacy support” discloses a system and apparatus providing power management and legacy support. An uninterruptable power supply is combined with a bus control module. The bus control module provides legacy support through a single connectivity. The bus control module monitors and controls power distribution within the system. A bus hub unit is coupled to the bus control module and provides a plurality of ports to which bus functions may be coupled.
U.S. Pat. No. 7,194,638 to Larky issued Mar. 20, 2007 entitled, “Device and method for managing power consumed by a USB device” discloses a method and device for reducing an amount of power consumed by a USB device (such as a host/hub/peripheral device which may include a receiver, PHY, synchronizer, or other component associated with a data path) adapted to communicate using one or more USB signals each having a synchronization field. The method may include measuring a length of the synchronization field; associating a power down level for an idle mode based in part on the measuring operation; and disabling one or more portions of the receiver when the USB bus is inactive and/or when the USB device is transmitting data. In this manner, the one or more portions of the receiver are disabled (i.e., powered off or placed in a low power standby mode) during a times when the bus is idle or when transmitting, which can reduce the total amount of power consumed by the USB device.
U.S. Pat. No. 7,188,263 to Rubinstein et al. issued Mar. 6, 2007 entitled, “Method and apparatus for controlling power state of a multi-lane serial bus link having a plurality of state transition detectors” discloses a system including two or more electrical components that can be placed into two or more power consumption states. The arrangement can take advantage of existing circuitry to selectively disable certain state transition detectors to thereby provide additional power reduction.
U.S. Pat. No. 7,159,132 to Takahashi et al. issued Jan. 2, 2007 entitled, “USB device that provides power that is different from power prescribed in the USB standard” discloses a USB device for performing communications with a second device through a USB interface while supplying electric power to the second device through a power-source supplying line in the USB interface. The USB device includes a communication unit for communicating with the second device, a power source capable of outputting electric power of a voltage being different from a standard power voltage prescribed in the standards of the USB interface. The power source supplies the electric power to the second device through the power-source supplying line. The second device includes a low load unit and a high load unit. The power source supplies the electric power having a power voltage higher than the standard power voltage to the high load unit through the power-source supplying line.
U.S. Pat. No. 7,069,347 to Kolokowsky issued Jun. 27, 2006 entitled, “Device and method for adapting speed of a USB device based on available power” discloses a device and method for adapting an operating speed of a USB peripheral device coupled with a host. In one example, the peripheral device is initially operated at a first operating speed associated with a first power consumption level, and it is determined whether the host will support the peripheral device operating at a second, higher power consumption level. If so, the peripheral device is reconfigured to operate at a second operating speed associated with the second power consumption level. In another example, the peripheral device may be initially operated at an operating speed of approximately 12 Mbps (i.e., full speed USB) so that the peripheral device draws no more than approximately 100 mA of current. The peripheral device may report a high power descriptor set including a 100 to 500 mA descriptor, and if the host selects the descriptor set, then the peripheral device is can reconfigure itself to operate with an operating speed of approximately 480 Mbps (i.e., high speed USB) so that the peripheral device draws approximately 100 to 500 mA of current. In this manner, the peripheral device can selectively operate in high speed USB mode if the host (or hub) can provide the current needed by the peripheral device to operate at the faster data rates of the high speed USB mode. If not, the peripheral device operates in the full speed USB mode.
U.S. Pat. No. 7,024,567 to Kim et al. issued Apr. 4, 2006 entitled, “Electric power controlling method through a serial bus” discloses a method of demanding/supplying a necessary electric power through a self-adjusting process between two devices connected by a Universal Serial Bus (USB), removing the requirement of disconnecting and re-connecting cable lines in order to make a power demand again. A power supplying device first determines how much electric power is demanded by a demanding device, then sends the device a signal of impossible supply or the like if the demand can not be met. The supplying device also determines whether or not a new electric power demand can be supplied if the demanding device demands again, and the supplying device then supplies power to the demanding device if the demand can be met. A power demanding device demands an electric power from a supplying device connected through the USB. The connected power demanding device first reduces the demand if a signal of impossible supply or the like is received from the supplying device, then demands the reduced amount from the supplying device.
U.S. Pat. No. 6,996,727 to Snyder et al. issued Feb. 7, 2006 entitled, “Power supply for universal serial bus interface with programmable bus pullup resistor” discloses an apparatus comprising a power supply device configured to generate a voltage. The voltage may comprise either (i) a standard voltage level or (ii) a power down voltage level. The power down voltage level may be configured to reduce current consumption.
U.S. Pat. No. 6,087,804 to Suda issued Jul. 11, 2000 entitled, “Electronic apparatus using the power supply line of a serial bus, for supplying and providing power appropriately” discloses an electronic apparatus comprising a power supply controller, a power supply circuit, a battery, and a host controller, when power is supplied to the apparatus through an AC power supply line, the power supply controller causes the power supply circuit to supply power to the main section and battery of the apparatus and to the power supply line of a serial bus. When no power is supplied to the apparatus through the AC power supply line and power is supplied to the apparatus through the power supply line of the serial bus, the power supply controller determines the amount of power to be consumed by the main section of the apparatus and the amount of power to charge battery with, from the amount of power represented by data supplied from the host controller, which represents the amount of power the power supply line of the serial bus can supply. The power supply controller controls the power supply circuit in accordance with the amount of power thus determined. When no power is supplied to the apparatus through the AC power supply line or the power supply line of the serial bus, the power supply controller controls the power supply circuit to supply power from the battery to the main section of the apparatus.
U.S. Pat. No. 5,787,298 to Broedner et al. issued Jul. 28, 1998 entitled, “Bus interface circuit for an intelligent low power serial bus” discloses a low power, single master, variable clock rate, daisy-chainable, serial bus connects a bus dispatch (master) to a chain of one or more daisy-chained peripheral devices (slaves). The bus has a bidirectional serial data line, a bidirectional clock line, unidirectional interrupt line, power and ground lines. Each peripheral device includes a first bidirectional signal line, a second bidirectional signal line coupled to the bus clock and data lines, respectively, and an interface circuit coupled to the first and second bidirectional signal lines. The interface circuit includes a first buffer circuit coupled to the first and second bidirectional signal lines, and a second buffer circuit coupled to the first buffer circuit. A control circuit in the interface circuit couples the first and second buffer circuits where in a first mode of operation, the control circuit passes signals on the first and second bidirectional signal lines through the first and second buffer circuits, and in a second mode of operation, the control circuit passes signals on the first and second bidirectional signal lines through the first buffer circuit and configures the second buffer circuit to terminate the first bidirectional signal line. Thus bus power supply line is coupled to the interface circuit and a voltage on the power supply line is used to power the first and second buffer circuits and the control circuit. The bus interrupt line is coupled to the control circuit of the interface circuit. The interface circuit is also coupled to signal lines of the peripheral device.
So called “Powered USB” (or “USB PlusPower technology”) is an alternative approach to providing power over a USB interface. As previously noted, traditional USB standards (e.g., USB 1.1, 2.0, etc.) allow peripheral devices to exchange data with and also to receive device power over the USB bus. This approach to power delivery is convenient, as it can obviate a power supply for each bus-powered peripheral device, as well as power strips, and more complex electrical infrastructure. As previously noted, however, the USB 1.1 and USB 2.0 protocols may limit bus supplied power to 2.5 Watts (0.5 A @+5V) per port (up to 500 mA). For higher power-draw devices such as printers or displays, existing USB power limits are often insufficient, requiring such peripherals to use an external power supply. This limitation significantly restricts the “plug-n-play” model conceived for USB peripherals. It also necessitates the use of other power-supplying equipment, such as power strips, wires, etc.
USB PlusPower (or powered USB) expands the USB 1.1 and USB 2.0 standards, increasing the maximum current and voltage for bus-powered peripherals. The USB PlusPower design provides several different voltage and current options: (i) +5 volts DC at up to 6 amps per connector (up to 30 Watts); (ii) +12 volts DC at up to 6 amps per connector (up to 72 Watts); and (iii) +24 volts DC at up to 6 amps per connector (up to 144 Watts). The USB PlusPower design provides a new cable design having two additional wire pairs inside the cable, and other elements to support the new current and voltage. However, the USB PlusPower as of the present time has no facility for dynamic power allocation or distribution across multiple ports; rather, it appears to merely raise the ceiling on power that can be supplied on a per-port basis.
Hence, despite the foregoing various approaches, there is a salient need for apparatus or methods for dynamically allocating current among a plurality of electrical ports. In the exemplary context of a serial bus, what is specifically needed is apparatus and methods for enabling a host controller to support multiple bus devices capable of drawing more power than what is required by a serial bus specification, yet at the same time, enabling a power supply to operate at or near its peak power efficiency (and be sized so as to avoid wasting power unduly, which can be critical for battery powered devices). Ideally, such apparatus and methods would be intelligent enough to dynamically and automatically allocate current as necessary, instead of requiring e.g., a user to toggle through a plurality of current settings adapted to accommodate one or more possible configurations of the serial bus system.